Design and implementation of 256-qam transceiver on fpga using matlab/simulink model

This paper discusses the Software Defined Radio-based Digital Transceiver, focusing on the 256-QAM transceiver used exclusively in 5G. The transceiver discussed here is software-defined, quite unlike that used in 5G.The 5G transceiver switches to the 256-QAM Modulation scheme when the received power is high. This paper uses the SIMULINK model to discuss the 256-QAM Modulation scheme, where the whole transceiver is designed and implemented on an FPGA. The speed and reconfigurability of the FPGAs are the driving forces for such an implementation. This Model's VHDL and C codes are generated automatically using the HDL workflow advisor. This circuit was designed and implemented on ZEDBOARD, which has an SoC comprising the Zync-7000 FPGA and ARM processor. The whole Model runs such that a part runs on the FPGA, and the rest runs on the ARM processor.